This disclosure relates generally to the field of chip design. More particularly, this disclosure relates to techniques for modifying repeated blocks for chip routing.
Semiconductor chips can be composed of complex electronic circuit arrangements. With each progressive generation of semiconductor technology, the number of components on a single chip can go up exponentially. The number of devices on a chip, as well as their close proximity, may drive significant effort in analysis. One key aspect of circuit design can involve the routing of signal to blocks and the routing of other signals over blocks. Due to the shear number of elements on a chip, and the fact that many of the blocks have become quite large, the routing issues can be challenging. Another key aspect of circuit design may involve implementing the layout of all the devices on chip. The relative placement of the devices may drive significant computation resources, as each cell must be selected, placed, and routed to across the entire chip.
Often times, a soft macro or block can be implemented more than once on chip. These multiple instances can be referred to as repeated blocks. If each instance of a repeated block is implemented independently, then the different timing and layout optimizations may cause the instances to be different. These differences may cause the implementation calculations to be redone for each instance of a repeated block. For example, the calculation for placement of cells within a block may be repeated for each repeated block instance. In addition, the calculation for placement of buffers for handling signals routed through each block may also be repeated for each instance of the repeated block. All of these calculations can require computing resources and time, which is a significant concern as chips become larger and more complex.
Furthermore, if the instances of a repeated block are all implemented independently, the differences can create debug problems, as each instance likely will have different properties. With independent implementation there may actually be problems where one instance would work and another instance would not work properly. Additionally, differences between instances of repeated blocks can also be problematic whenever a modification is required in a repeated block. A modification, also often referred to as an Engineering Change Order (ECO), likely must be implemented on each and every instance. Moreover, verification also can become a problem for repeated blocks, since each verification step likely must be repeated on each instance.
Accordingly, what is desired are improved methods and apparatus for solving some of the problems discussed above. Additionally, what is desired are improved methods and apparatus for reducing some of the drawbacks discussed above.